The present invention relates to integrated circuits, and more particularly, the present invention relates to testing integrated circuits.
Integrated circuits, such as processors and application specific integrated circuits, are routinely fabricated from millions of signal sources, such as logic gates. The interconnections that couple logic gates together are called nodes. One or more logic gates may be coupled to a node. During the operation of a digital integrated circuit, the nodes carry signals that have positive and negative logic levels. In testing a digital integrated circuit, input signals are provided to the integrated circuit and the signals at each node are monitored to determine whether the circuit is operating correctly. Specifically, for a digital integrated circuit, each node must be capable of assuming a positive logic level and a negative logic level. For nodes in a digital integrated circuit not connected to an output pad, the positive and negative logic levels cannot be measured directly. Therefore, testing the operation of a particular node in an integrated circuit often requires identifying a sequence of input signals to the integrated circuit that causes a change in the logic level at the particular node and that also causes a corresponding change in the logic level at an output pad not directly connected to the particular node. Unfortunately, in many integrated circuits some nodes are not testable in this way because a pattern of signals does not exist for changing the logic level of a particular node and having the change in logic level reflected at an output pad not directly connected to the particular node.
Integrated circuits can be fabricated with optical switching devices providing backside optical input/output (I/O). An integrated circuit is typically formed on one side of a substrate. The side of the substrate opposite from the side on which the integrated circuit is typically formed or located is the backside of the substrate. Backside optical I/O is provided by optical switching devices fabricated on the backside of a substrate. Optical switching devices do not require output pads in order to couple output signals to circuits external to the integrated circuit and the die. The output signals from optical switching devices can be coupled to circuits external to a die through an optical beam. Optical switching devices can also be connected to nodes in the integrated circuit. Specifically, optical switching devices can be connected to nodes that are not testable through I/O pads. FIG. 1 is an illustration of a prior art system 100 for testing a signal source 102 using an optical switching device 104. The optical switching device 104 may be fabricated from a pn-junction or a metal-oxide semiconductor (MOS) gate. If device 104 is fabricated from a pn-junction and a laser beam 106 is coupled to the pn-junction through the backside of silicon die 108, then the reflected beam 110 is produced at the pn-junction. If an electrical signal from signal source 102 is applied to the pn-junction while laser beam 106 is coupled to the pn-junction, then reflected beam 110 is modulated by the electrical signal and includes the information contained in the electrical signal. Similarly, if the optical switching device 104 fabricated from a MOS gate having a charge layer and the laser beam 106 is coupled to the charge layer through the backside of silicon die 108, then the reflected beam 110 is generated at the charge layer. If an electrical signal from signal source 102 is applied to the charge layer while laser beam 106 is coupled to the charge layer, then reflected beam 110 is modulated by the electrical signal and includes the information contained in the electrical signal. For optical switching device 104, reflected beam 110 is converted to detected signal 114 at an output port of detector 116.
Unfortunately, several problems arise in attempting to recover the information contained in reflected beam 110. First, the modulation of reflected beam 110 is small, so reflected beam 110 has a low signal-to-noise ratio, which decreases the probability of correctly detecting the information contained in reflected beam 110. Second, since reflected beam 110 has a low signal-to-noise ratio, detected signal 114, which is generated at detector 116 from reflected beam 110, is sensitive to the alignment of reflected beam 110 with detector 116. Any misalignment between reflected beam 110 and detector 116 decreases the probability of correctly detecting the information contained in reflected beam 110. Third, since the refractive index of silicon varies with temperature, temperature changes in the integrated circuit cause the direct current component of the signal generated at detector 116 to drift. Drift at detector 116 also decreases the probability of correctly detecting the information contained in reflected beam 110 and is a significant problem in attempting to decode phase encoded information from reflected beam 110. Finally, each of the above described problems increases the difficulty of successfully testing a logic node through a single backside I/O device.
For these and other reasons there is a need for the present invention.